From: Angelo Dureghello <adureghello@xxxxxxxxxxxx> Add a new compatible and related bindigns for the fpga-based "ad3552r" AXI IP core, a variant of the generic AXI DAC IP. The AXI "ad3552r" IP is a very similar HDL (fpga) variant of the generic AXI "DAC" IP, intended to control ad3552r and similar chips, mainly to reach high speed transfer rates using a QSPI DDR (dobule-data-rate) interface. The ad3552r device is defined as a child of the AXI DAC, that in this case is acting as an SPI controller. Signed-off-by: Angelo Dureghello <adureghello@xxxxxxxxxxxx> --- .../devicetree/bindings/iio/dac/adi,axi-dac.yaml | 49 +++++++++++++++++++++- 1 file changed, 48 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml b/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml index a55e9bfc66d7..e15d02ef6be9 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml @@ -19,11 +19,13 @@ description: | memory via DMA into the DAC. https://wiki.analog.com/resources/fpga/docs/axi_dac_ip + https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html properties: compatible: enum: - adi,axi-dac-9.1.b + - adi,axi-ad3552r reg: maxItems: 1 @@ -41,13 +43,28 @@ properties: '#io-backend-cells': const: 0 + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + required: - compatible - dmas - reg - clocks -additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: adi,axi-ad3552r + then: + $ref: /schemas/spi/spi-controller.yaml# + +unevaluatedProperties: false examples: - | @@ -59,4 +76,34 @@ examples: #io-backend-cells = <0>; clocks = <&axi_clk>; }; + + - | + #include <dt-bindings/gpio/gpio.h> + axi_dac: spi@44a70000 { + compatible = "adi,axi-ad3552r"; + reg = <0x44a70000 0x1000>; + dmas = <&dac_tx_dma 0>; + dma-names = "tx"; + #io-backend-cells = <0>; + clocks = <&axi_clk>; + + #address-cells = <1>; + #size-cells = <0>; + + dac@0 { + compatible = "adi,ad3552r"; + reg = <0>; + reset-gpios = <&gpio0 92 GPIO_ACTIVE_HIGH>; + io-backends = <&axi_dac>; + spi-max-frequency = <66000000>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + adi,output-range-microvolt = <(-10000000) (10000000)>; + }; + }; + }; ... -- 2.45.0.rc1
