On Tue, Sep 05, 2023 at 03:38:35PM +0530, Dharma Balasubiramani wrote:
> As per the datasheet, the clock selection Bits 2:0 – TCCLKS[2:0] should
> be set to 0 while using the internal GCLK (TIMER_CLOCK1).
>
> Fixes: 106b104137fd ("counter: Add microchip TCB capture counter")
> Signed-off-by: Dharma Balasubiramani <dharma.b@xxxxxxxxxxxxx>
> ---
> drivers/counter/microchip-tcb-capture.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c
> index e2d1dc6ca668..c7af13aca36c 100644
> --- a/drivers/counter/microchip-tcb-capture.c
> +++ b/drivers/counter/microchip-tcb-capture.c
> @@ -98,7 +98,7 @@ static int mchp_tc_count_function_write(struct counter_device *counter,
> priv->qdec_mode = 0;
> /* Set highest rate based on whether soc has gclk or not */
> bmr &= ~(ATMEL_TC_QDEN | ATMEL_TC_POSEN);
> - if (priv->tc_cfg->has_gclk)
> + if (!priv->tc_cfg->has_gclk)
> cmr |= ATMEL_TC_TIMER_CLOCK2;
> else
> cmr |= ATMEL_TC_TIMER_CLOCK1;
> --
> 2.25.1
Applied to counter-fixes as commit df8fdd01c98b.
Thanks,
William Breathitt Gray
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