On Thu, 5 Jan 2023 13:53:30 +0100
Olivier Moysan <olivier.moysan@xxxxxxxxxxx> wrote:
> Add support of identification registers to STM32 DFSDM
> to allow hardware capabilities discovery and configuration check.
> The number of filters and channels, are read from registers,
> when they are available.
>
> Signed-off-by: Olivier Moysan <olivier.moysan@xxxxxxxxxxx>
One minor thing inline. I'll tweak it whilst applying.
Applied with that tweak to the togreg branch of iio.git and pushed out
as testing for 0-day etc to look at it.
Thanks,
Jonathan
> ---
> Changes in v2:
> - Add and update comments
> - Remove useless masks
> diff --git a/drivers/iio/adc/stm32-dfsdm.h b/drivers/iio/adc/stm32-dfsdm.h
> index 4afc1f528b78..b64cfb42c549 100644
> --- a/drivers/iio/adc/stm32-dfsdm.h
> +++ b/drivers/iio/adc/stm32-dfsdm.h
> @@ -13,25 +13,29 @@
...
> /*
> @@ -231,6 +235,28 @@
> #define DFSDM_AWCFR_AWHTF_MASK GENMASK(15, 8)
> #define DFSDM_AWCFR_AWHTF(v) FIELD_PREP(DFSDM_AWCFR_AWHTF_MASK, v)
>
> +/*
> + * Identification register definitions
> + */
> +#define DFSDM_HWCFGR 0x7F0
> +#define DFSDM_VERR 0x7F4
> +#define DFSDM_IPIDR 0x7F8
> +#define DFSDM_SIDR 0x7FC
> +
> +/* HWCFGR: Hardware configuration register */
> +#define DFSDM_HWCFGR_NBT_SHIFT 0
The _SHIFT macros don't add anything useful over using
the _MASK ones directly. So drop them.
> +#define DFSDM_HWCFGR_NBT_MASK GENMASK(7, 0)
> +#define DFSDM_HWCFGR_NBF_SHIFT 8
> +#define DFSDM_HWCFGR_NBF_MASK GENMASK(15, 8)
> +
> +/* VERR: Version register */
> +#define DFSDM_VERR_MINREV_SHIFT 0
> +#define DFSDM_VERR_MINREV_MASK GENMASK(3, 0)
> +#define DFSDM_VERR_MAJREV_SHIFT 4
> +#define DFSDM_VERR_MAJREV_MASK GENMASK(7, 4)
> +
> +#define STM32MP15_IPIDR_NUMBER 0x00110031
> +
> /* DFSDM filter order */
> enum stm32_dfsdm_sinc_order {
> DFSDM_FASTSINC_ORDER, /* FastSinc filter type */
