Re: [PATCH 1/4] staging: iio: frequency: ad9832: Fix alignment for DMA safety

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On Sun, Aug 7, 2022 at 5:26 PM Jonathan Cameron <jic23@xxxxxxxxxx> wrote:
>
> From: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
>
> ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
> on platforms with 128 byte cachelines above L1.  Switch to the updated
> IIO_DMA_MINALIGN definition.

...

>         union {
> -               __be16                  freq_data[4]____cacheline_aligned;
> +               __be16                  freq_data[4] __aligned(IIO_DMA_MINALIGN);
>                 __be16                  phase_data[2];
>                 __be16                  data;
>         };

Hmm... Can we rather mark the entire union with it?

-- 
With Best Regards,
Andy Shevchenko



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