Re: [PATCH v6 07/13] mfd: mt6370: Add MediaTek MT6370 support

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On Mon, Jul 25, 2022 at 11:06 AM ChiaEn Wu <peterwu.pub@xxxxxxxxx> wrote:
> On Mon, Jul 25, 2022 at 4:43 PM Andy Shevchenko
> <andy.shevchenko@xxxxxxxxx> wrote:

...

> > > > > +#define MT6370_REG_DEV_INFO    0x100
> > > > > +#define MT6370_REG_CHG_IRQ1    0x1C0
> > > > > +#define MT6370_REG_CHG_MASK1   0x1E0
> > > > > +
> > > > > +#define MT6370_VENID_MASK      GENMASK(7, 4)
> > > > > +
> > > > > +#define MT6370_NUM_IRQREGS     16
> > > > > +#define MT6370_USBC_I2CADDR    0x4E
> > > >
> > > > > +#define MT6370_REG_ADDRLEN     2
> > > > > +#define MT6370_REG_MAXADDR     0x1FF
> > > >
> > > > These two more logically to have near to other _REG_* definitions above.

...

> > You lost me. Namespace has a meaning, i.e. grouping items of a kind.
> > In your proposal I don't see that. If REG_MAXADDR and REG_ADDRLEN are
> > _not_ of the _REG_ kind as per above, why do they have this namespace
> > in the first place?

> oh... Sorry, I just got the wrong meaning
> maybe it should be revised like this, right??

I don't know. I am not an author of the code, I do not have access
(and don't want to) to the hardware datasheets, all up to you. From
the style perspective below looks good.

> -------------------------------------------------------------------
> #define MT6370_REG_DEV_INFO    0x100
> #define MT6370_REG_CHG_IRQ1    0x1C0
> #define MT6370_REG_CHG_MASK1   0x1E0
> #define MT6370_REG_MAXADDR     0x1FF // Move it to here
>
> #define MT6370_VENID_MASK      GENMASK(7, 4)
>
> #define MT6370_NUM_IRQREGS     16
> #define MT6370_USBC_I2CADDR    0x4E
>
> #define MT6370_MAX_ADDRLEN     2    // Rename



-- 
With Best Regards,
Andy Shevchenko



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