On Thu, 12 May 2022 00:06:10 +0200 Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx> wrote: > These channels are specified in downstream kernels [1] and actively used > by ie. the Sony Seine platform on the SM6125 SoC. Looking at the links, some of them are on that platform but not all. Better to make that explicit in this description. > > [1]: https://source.codeaurora.org/quic/la/kernel/msm-4.14/tree/drivers/iio/adc/qcom-spmi-adc5.c?h=LA.UM.7.11.r1-05200-NICOBAR.0#n688 > > Signed-off-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxxx> I'm not keen on patches with no context being sent to mailing lists. Please cc all lists (and preferably individuals) on at least the cover letter so we can see overall discussion. If nothing else, I've no idea if intent is that the patches go through different trees or all need to merge via one route. Patch itself looks fine, Jonathan > --- > drivers/iio/adc/qcom-spmi-adc5.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c > index 87438d1e5c0b..69c7fd44d34c 100644 > --- a/drivers/iio/adc/qcom-spmi-adc5.c > +++ b/drivers/iio/adc/qcom-spmi-adc5.c > @@ -526,6 +526,8 @@ static const struct adc5_channels adc5_chans_pmic[ADC5_MAX_CHANNEL] = { > SCALE_HW_CALIB_DEFAULT) > [ADC5_VBAT_SNS] = ADC5_CHAN_VOLT("vbat_sns", 1, > SCALE_HW_CALIB_DEFAULT) > + [ADC5_VCOIN] = ADC5_CHAN_VOLT("vcoin", 1, > + SCALE_HW_CALIB_DEFAULT) > [ADC5_DIE_TEMP] = ADC5_CHAN_TEMP("die_temp", 0, > SCALE_HW_CALIB_PMIC_THERM) > [ADC5_USB_IN_I] = ADC5_CHAN_VOLT("usb_in_i_uv", 0, > @@ -549,6 +551,16 @@ static const struct adc5_channels adc5_chans_pmic[ADC5_MAX_CHANNEL] = { > SCALE_HW_CALIB_THERM_100K_PULLUP) > [ADC5_AMUX_THM2] = ADC5_CHAN_TEMP("amux_thm2", 0, > SCALE_HW_CALIB_PM5_SMB_TEMP) > + [ADC5_AMUX_THM3] = ADC5_CHAN_TEMP("amux_thm3", 0, > + SCALE_HW_CALIB_PM5_SMB_TEMP) > + [ADC5_GPIO1_100K_PU] = ADC5_CHAN_TEMP("gpio1_100k_pu", 0, > + SCALE_HW_CALIB_THERM_100K_PULLUP) > + [ADC5_GPIO2_100K_PU] = ADC5_CHAN_TEMP("gpio2_100k_pu", 0, > + SCALE_HW_CALIB_THERM_100K_PULLUP) > + [ADC5_GPIO3_100K_PU] = ADC5_CHAN_TEMP("gpio3_100k_pu", 0, > + SCALE_HW_CALIB_THERM_100K_PULLUP) > + [ADC5_GPIO4_100K_PU] = ADC5_CHAN_TEMP("gpio4_100k_pu", 0, > + SCALE_HW_CALIB_THERM_100K_PULLUP) > }; > > static const struct adc5_channels adc7_chans_pmic[ADC5_MAX_CHANNEL] = {
