On Thu, Sep 08, 2011 at 03:09:23PM +0100, Jonathan Cameron wrote:
> Note half writes currently assume address numbers are even only.
> That's a pain for caching so other suggestions welcome. I could set
> it as a 7 bit address and increase the padding to 9 bits. That makes
> the write bit a little strange though as it will be going into the
> padding.
This needs more documentation somewhere explaining what a half write is
and/or a better name for half write but doesn't look too invasive so I
think this approach can work. If we come up with something better later
then we can always change things, there shouldn't be too many users to
update if that happens.
> - map->format.reg_bytes = config->reg_bits / 8;
> + map->format.buf_size = (config->reg_bits +
> + config->reg_pad_bits +
> + config->val_bits) / 8;
> + map->format.reg_bytes = (config->reg_bits + config->reg_pad_bits)/ 8;
Please do a patch adding padding separately - that does seem like a
useful thing to have in general, with the option of having it both
before and after the register.
> - if (val == map->work_buf + map->format.reg_bytes)
> - ret = map->bus->write(map->dev, map->work_buf,
> - map->format.reg_bytes + val_len);
> - else if (map->bus->gather_write)
> + if (val == map->work_buf + map->format.reg_bytes) {
> + if (map->format.half_write) {
> + ret = map->bus->write(map->dev, map->work_buf,
> + (map->format.reg_bytes +
> + val_len) >> 1);
> + if (ret >= 0)
> + ret = map->bus->write(map->dev,
> + map->work_buf +
> + ((map->format.reg_bytes +
> + val_len) >> 1),
> + (map->format.reg_bytes +
> + val_len) >> 1);
> + } else {
> + ret = map->bus->write(map->dev, map->work_buf,
> + map->format.reg_bytes + val_len);
> + }
This code is getting very complicated... I think it'd be clearer to
have a special case at the head of the function that does the half write
stuff. It also feels like the half bit needs parameterisation, but I
can't immediately think of how to do that sensibly.
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