On 10/2/23 15:21, Mika Westerberg wrote: > On Tue, Sep 26, 2023 at 12:55:05PM +0800, Koba Ko wrote: >> On Mon, Sep 25, 2023 at 5:27 PM Damien Le Moal <dlemoal@xxxxxxxxxx> wrote: >>> >>> On 2023/09/25 11:13, Mika Westerberg wrote: >>>> Hi, >>>> >>>> On Mon, Sep 25, 2023 at 11:09:01AM +0200, Damien Le Moal wrote: >>>>> On 2023/09/25 10:05, Mika Westerberg wrote: >>>>>> Intel Alder Lake-P AHCI controller needs to be added to the mobile >>>>>> chipsets list in order to have link power management enabled. Without >>>>>> this the CPU cannot enter lower power C-states making idle power >>>>>> consumption high. >>>>>> >>>>>> Cc: Koba Ko <koba.ko@xxxxxxxxxxxxx> >>>>>> Signed-off-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> >>>>> >>>>> Looks OK, but given that there is a tendency of the low power stuff to be buggy, >>>>> was this well tested ? >>>> >>>> Yes it was tested (Koba Cc'd can confirm this). We also confirmed from >>>> Intel AHCI folks that the ADL (and RPL) AHCI controllers fully support >>>> this configuration. >> >> I verified on an ADL platform with odd and disk devices and >> they work fine. > > Thanks! > > @Damien, just checking whether this fell through cracks because I do not > see it applied to libata.git next branches? Sorry about the delay. I was traveling and the suspend/resume fixes used all my bandwidth. Will queue this today. Do you want this for 6.7 or as a fix for 6.6 ? The latter is OK. -- Damien Le Moal Western Digital Research