On 2023/09/25 10:05, Mika Westerberg wrote:
> Intel Alder Lake-P AHCI controller needs to be added to the mobile
> chipsets list in order to have link power management enabled. Without
> this the CPU cannot enter lower power C-states making idle power
> consumption high.
>
> Cc: Koba Ko <koba.ko@xxxxxxxxxxxxx>
> Signed-off-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>
Looks OK, but given that there is a tendency of the low power stuff to be buggy,
was this well tested ? Also, does this need a Fixes/CC stable tag ? If not, I
will queue this for 6.7.
> ---
> drivers/ata/ahci.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
> index 08745e7db820..d96f80b6ff5d 100644
> --- a/drivers/ata/ahci.c
> +++ b/drivers/ata/ahci.c
> @@ -423,6 +423,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
> { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */
> /* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */
> { PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */
> + { PCI_VDEVICE(INTEL, 0x7ae2), board_ahci_low_power }, /* Alder Lake-P AHCI */
>
> /* JMicron 360/1/3/5/6, match class to avoid IDE function */
> { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
--
Damien Le Moal
Western Digital Research
