Hello, (cc'ing Jeff) On Thu, Sep 22, 2011 at 09:55:12AM +0800, ming.lei@xxxxxxxxxxxxx wrote: > From: Ming Lei <ming.lei@xxxxxxxxxxxxx> > > This quirk patch fixes one kind of bug inside Intel Sandybridge CPT > chipset, see reports from > > https://bugzilla.kernel.org/show_bug.cgi?id=40592. > > Many guys also have reported the problem before: > > https://bugs.launchpad.net/bugs/737388 > https://bugs.launchpad.net/bugs/794642 > ...... > > With help from Tejun, the problem is found to be caused by 32bit PIO > mode, so introduce the quirk patch to disable 32bit PIO on SATA piix > for Sandybridge CPT chipset. Have we successfully localized the problem to SNB? If so, great. > static struct ata_port_operations piix_vmw_ops = { > @@ -1585,6 +1586,15 @@ static int __devinit piix_init_one(struct pci_dev *pdev, > "on poweroff and hibernation\n"); > } > > + /* > + * Sandybridge chipset H61/P67/H67 have broken 32 mode up to now > + * see https://bugzilla.kernel.org/show_bug.cgi?id=40592 > + */ > + if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x1c00) > + piix_sata_ops.inherits = &ata_bmdma_port_ops; > + else > + piix_sata_ops.inherits = &ata_bmdma32_port_ops; > + No, this wouldn't work. Ops inheritance isn't dynamic. Please define a separate ata_port_operations for controller which require 16bit PIO - piix_pata16_ops, create a new controller id (say, ich_snb_pata), add an accompanying port_info entry and device_id entry. Thank you. -- tejun -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
