From: Ming Lei <ming.lei@xxxxxxxxxxxxx> This quirk patch fixes one kind of bug inside Intel Sandybridge CPT chipset, see reports from https://bugzilla.kernel.org/show_bug.cgi?id=40592. Many guys also have reported the problem before: https://bugs.launchpad.net/bugs/737388 https://bugs.launchpad.net/bugs/794642 ...... With help from Tejun, the problem is found to be caused by 32bit PIO mode, so introduce the quirk patch to disable 32bit PIO on SATA piix for Sandybridge CPT chipset. Signed-off-by: Tejun Heo <htejun@xxxxxxxxx> Signed-off-by: Ming Lei <ming.lei@xxxxxxxxxxxxx> --- drivers/ata/ata_piix.c | 12 +++++++++++- 1 files changed, 11 insertions(+), 1 deletions(-) diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 43107e9..eb7ea56 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c @@ -341,11 +341,12 @@ static struct ata_port_operations piix_sata_ops = { }; static struct ata_port_operations piix_pata_ops = { - .inherits = &piix_sata_ops, + .inherits = &ata_bmdma32_port_ops, .cable_detect = ata_cable_40wire, .set_piomode = piix_set_piomode, .set_dmamode = piix_set_dmamode, .prereset = piix_pata_prereset, + .sff_irq_check = piix_irq_check, }; static struct ata_port_operations piix_vmw_ops = { @@ -1585,6 +1586,15 @@ static int __devinit piix_init_one(struct pci_dev *pdev, "on poweroff and hibernation\n"); } + /* + * Sandybridge chipset H61/P67/H67 have broken 32 mode up to now + * see https://bugzilla.kernel.org/show_bug.cgi?id=40592 + */ + if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x1c00) + piix_sata_ops.inherits = &ata_bmdma_port_ops; + else + piix_sata_ops.inherits = &ata_bmdma32_port_ops; + port_info[0] = piix_port_info[ent->driver_data]; port_info[1] = piix_port_info[ent->driver_data]; -- 1.7.5.4 -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
