On 24/02/2011 9:06 PM, Tejun Heo wrote:
Hello,
(cc'ing Justin)
On Thu, Feb 24, 2011 at 08:53:15PM +1100, Steven Haigh wrote:
On 24/02/2011 7:31 PM, Tejun Heo wrote:
Well, yeah, IDENTIFY failure is still there. Controllers behave
differently and some may have higher tolerance under certain
circumstances but the setup just seems quite flimsy for whatever
reason.
Yeah - I noticed that. These things can never be simple, can they?!
Could it just be that the cradle is slow to initialise and therefore
the sata_sil adapter gives up before the cradle is actually ready?
Following this logic, I tried powering up the cradle before
connecting the esata cable. I don't see anything in dmesg connecting
the esata cable AFTER the cradle has been powered on. Maybe the
cradle disables the esata connection if theres no cable connected on
powerup?
Is the cradle an active device or is it just power supply +
eSATA->SATA gender? Oh, right, you said it also had USB connection,
so it's an active device. Can you open it up and see which chip is
there?
Of course I can crack it open - thats what makes life fun!
The top side of the internal PCB is fairly plain with just the SATA
power& data sockets on it and the various USB ports and card
sockets on the front.
On the rear, we have a 30Mhz and a 12Mhz oscillator and 3 main CPU
type chips.
Near the card readers:
GL826 / MX2AE08G08 / 842H35518 - I assume this is the IDE / CF /
card IO chip.
Yeah, that's the card reader.
Near the rear:
JMB352 / 0834 LGBA1 A / 370JF3011 - This looks to be hooked up via
some capacitors to the DATA data lines on both sockets. If I haven't
mentioned before, this is a 2 x SATA drive bay cradle.
This is the SATA part.
A third tiny chip near the JMB352 is:
GL850A / MN2FA01G11 / 911SK03111 - Not 100% sure of the function of
this chip by following the tracks, but it looks like it might be
some kind of a clock source. That is a wild guess though!
This is USB thingie.
So, the offending part is JMB352. Justin, when JMB352 is doing e-SATA
interface, it's failing IDENTIFY. sata_sil fails to recognize it and
ahci (right? Steven) succeeds only after IDENTIFY failures and
retries. Any ideas what's going on? When doing e-SATA, is the chip
active or passive? ie. Does it just pass through the signals or do
some meddling inbetween?
Has there been any progress on this as yet? I haven't heard anything in
a while...
--
Steven Haigh
Email: netwiz@xxxxxxxxx
Web: http://www.crc.id.au
Phone: (03) 9001 6090 - 0412 935 897
Fax: (03) 8338 0299
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