On Wed, Mar 10, 2010 at 7:45 PM, Tejun Heo <tj@xxxxxxxxxx> wrote: > On 03/11/2010 12:33 PM, Mark Lord wrote: >> If it's like their non-AHCI controllers (sata_mv), then the chipset/phy >> could be very particular about the sequence/timing used when changing >> speeds. This is certainly possible. The 6121 has a PATA port, and can be used with the sata_mv driver also. > BTW, if not allowing PHY speed adjustment is necessary, the correct > way to implement that is in ->port_start() by modifying > link->hw_sata_spd_limit. But I really hope there's some other way to > solve this. I assume you're talking about setting hw_sata_spd_limit to 1.5Gbps so that sata_down_spd_limit() doesn't do anything? That will work, but it would still be nice to be able to run at 3.0Gbps on these ports. If anyone has any more elegant solutions they would like me to test, just let me know. Thanks, -Justin -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
