On Mon, Jan 04, 2010 at 10:26:58PM -0800, David Miller wrote: > From: Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx> > Date: Mon, 04 Jan 2010 22:14:55 +0300 > > > I suggest that we completely ignore the "FIFO empty" > > bit. dma_test_irq() method which is called eventually when doing FMA > > should yield the needed result WRT FIFO flushing, filtering out . > > Can someone implement and test such a revised patch? Do we have any guarantee that the interrupt bit in this register will only be set when the DMA FIFOs on the card have emptied? Unlike the SFF status register's interrupt bit, which is defined by SFF to only be asserted when the drive signals an interrupt _and_ the FIFOs have emptied, there seems to be no such words in the PDC20246 data which suggests that the same is true of the interrupt bit in this alternative register. Therefore, I would suggest that using this alternative bit could be unsafe with shared interrupts without also qualifying it with the FIFO empty bit - we could end up disabling the DMA before the transfer has completed, thereby corrupting the last few words of a transfer from the drive. What was the reason for checking this alternate promise-special register in the first place, rather than the SFF BM-DMA status register? -- Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of: -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
