On 11/26/2009 10:15 AM, Alan Cox wrote:
On Thu, 26 Nov 2009 15:53:58 +0100
Bartlomiej Zolnierkiewicz<bzolnier@xxxxxxxxx> wrote:
On Wednesday 25 November 2009 06:25:52 pm Alan Cox wrote:
On Wed, 25 Nov 2009 18:04:15 +0100
Bartlomiej Zolnierkiewicz<bzolnier@xxxxxxxxx> wrote:
From: Bartlomiej Zolnierkiewicz<bzolnier@xxxxxxxxx>
Subject: [PATCH] pata_efar: MWDMA0 is unsupported
MWDMA0 timings cannot be met with the PIIX based controller
programming interface.
The efar documentation makes no reference to not being capable of MWDMA0,
so where does this come from ? No MWDMA0 is an Intel erratum it appears.
No MWDMA0 support is a common issue on all 'PIIX-like' controllers.
In case of this chipset while the (preliminary) documentation claims MWDMA0
support on the 'FEATURES' page the later 'programming guide' part describes
only PIO0-4, SWDMA2, MWDMA1-2 and UDMA0-4 transfer modes as supported.
Cool - I only have the original docs.
ACK Bart's patch, then?
This thread was a bit unclear, and I want to be certain (well, as
certain as we can be :))
Jeff
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