On Thursday 26 November 2009 04:33:13 pm Sergei Shtylyov wrote: > Hello. > > Alan Cox wrote: > > >>On Wednesday 25 November 2009 06:25:52 pm Alan Cox wrote: > > >>>On Wed, 25 Nov 2009 18:04:15 +0100 > >>>Bartlomiej Zolnierkiewicz <bzolnier@xxxxxxxxx> wrote: > > >>>>From: Bartlomiej Zolnierkiewicz <bzolnier@xxxxxxxxx> > >>>>Subject: [PATCH] pata_efar: MWDMA0 is unsupported > > >>>>MWDMA0 timings cannot be met with the PIIX based controller > >>>>programming interface. > > >>>The efar documentation makes no reference to not being capable of MWDMA0, > >>>so where does this come from ? No MWDMA0 is an Intel erratum it appears. > > >>No MWDMA0 support is a common issue on all 'PIIX-like' controllers. > > >>In case of this chipset while the (preliminary) documentation claims MWDMA0 > >>support on the 'FEATURES' page the later 'programming guide' part describes > >>only PIO0-4, SWDMA2, MWDMA1-2 and UDMA0-4 transfer modes as supported. > > > Cool - I only have the original docs. > > Hm, me too... perhaps worth putting in Jeff's documentation archive? Me too? I just have what 'The Good Uncle Google' has.. -- Bartlomiej Zolnierkiewicz -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
