Re: PIO with SSDs: needs a long DRQ-after-command timeout for WRITEs

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Robert Hancock wrote:

No idea about IDE, but libata does not wait at all for DRQ assertion specifically, after issuing the PIO command it waits for BSY to be deasserted and then expects either DRQ, DF or ERR to be set, else it's a host state machine violation and triggers error handling. According to the ATA spec, the device is specifically not allowed to set DRQ to one while BSY is not asserted.

IDE is really only waiting 50msec in this case? That seems rather

   The whole 100 ms if you look at how WAIT_DRQ is #define'd...

MBR, Sergei
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