Thanks for verifying.
MATSUBAYASHI 'Shaolin' Kohji wrote:
> At Thu, 29 May 2008 10:45:18 +0900,
> Tejun Heo wrote:
>> With the patch applied, control should never reach either of the above
>> two lines. Can you please double check?
>
> I applied the following patch to check where the booting stops at
>
>
> --- drivers/ata/ata_piix.c.orig 2008-05-29 12:26:18.000000000 +0900
> +++ drivers/ata/ata_piix.c 2008-05-29 12:20:19.000000000 +0900
> @@ -251,6 +251,7 @@
> { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
> /* Mobile SATA Controller IDE (ICH8M), Apple */
> { 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata },
> + { 0x8086, 0x2828, 0x106b, 0x00a1, 0, 0, ich8m_apple_sata },
This should make your controller to use type ich8m_apple_sata.
> /* SATA Controller IDE (ICH9) */
> { 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
> /* SATA Controller IDE (ICH9) */
> @@ -526,7 +527,7 @@
>
> [ich8m_apple_sata] =
> {
> - .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
> + .flags = PIIX_SATA_FLAGS,
> .pio_mask = 0x1f, /* pio0-4 */
> .mwdma_mask = 0x07, /* mwdma0-2 */
> .udma_mask = ATA_UDMA6,
Which doesn't have PIIX_FLAG_SIDPR set.
> @@ -1360,6 +1361,8 @@
> if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR))
> return;
And triggers this condition and return.
> +dev_printk(KERN_INFO, &pdev->dev, "PASSED: checking PIIX_FLAG_SIDPR\n");
> +
> if (pci_resource_start(pdev, PIIX_SIDPR_BAR) == 0 ||
> pci_resource_len(pdev, PIIX_SIDPR_BAR) != PIIX_SIDPR_LEN)
> return;
So, it shouldn't get here. Strange. Ah... Crap. Now I see it.
Generic entry for 2828 is above ich8m_apple_sata entry. I wonder how
this ever worked. Here's the updated patch. This is without the SIDPR
change. If this doesn't work please remove PIIX_FLAG_SIDPR from
ich8m_apple_sata entry and see whether that helps.
Thanks.
--
tejun
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index a9027b8..02d6efe 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -247,10 +247,11 @@ static const struct pci_device_id piix_pci_tbl[] = {
{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller 2 IDE (ICH8) */
{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
- /* Mobile SATA Controller IDE (ICH8M) */
- { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* Mobile SATA Controller IDE (ICH8M), Apple */
{ 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata },
+ { 0x8086, 0x2828, 0x106b, 0x00a1, 0, 0, ich8m_apple_sata },
+ /* Mobile SATA Controller IDE (ICH8M) */
+ { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH9) */
{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH9) */
