[PATCHSET #upstream-fixes] libata: fix a bunch of PMP related problems

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Hello,

This patchset is started from investigating sil24 - mv4140 PMP
detection / NCQ problems.  It soon turned out there are quite a number
of issues lurking in the current PMP implementation.

* We still have a hole during reset where hotplug can go unnoticed.

* PMP r/w timeout is too short.  It's currently 250ms.  This is from
  SIMG PMPs and was mainly to avoid longish sequential multiple
  timeouts when access PMP regs via polled commands which is not the
  case anymore and mv 4140 and SIMG4726 needs more time occasionally.

* SDB Notify is not masked during fan-out port resets if PMP hasn't
  been reset in that pass.  This causes PMP register access failure
  because SDB Notify is received while PMP register write is in
  progress for fan-out reset.  I missed this because most of my
  testing was before PMP register access was converted to IRQ driven.

* ata_lpm_schedule() is called during probe right after SCSI scan is
  complete which schedules EH immediately, reliably triggering above
  two on certain hardware combinations.  This by itself should be okay
  but makes other problems more painful.

* sil3124/32 and mv4140 combination for some reason can't do NCQ
  reliably.  I don't know why.  I'll blacklist it for the time being
  and contact both companies about this.

* recovered errors shouldn't trigger resets.

* SIMG4726 config device still is a real pain in the ass.

This patchset contains ten patches addressing all the above issues.
Although this patchset is rather large, it's basically bug fixes.

The patchset fixes all hotplug problems I can reproduce including the
hotplug problems on inic162x and JMB ahcis.  The only remaining issue
is that sometimes device detection gets delayed by 30sec IDENTIFY
timeout.  I'll prep a patchset to make EH command timeouts more
intelligent (for #upstream).

The sad part is that with PMP in the mix and the current host
controller designs, we have inherent race condition during reset (no
reliable way to wait for the initial D2H FIS after hardresetting
fan-out port, so SRST races with D2H FIS) and this seems to lead to
problems during or after reset sometimes.  We have to resort to
intelligently timed retries to make it work bearably.

Thanks.

 drivers/ata/libata-core.c |   40 ++++----
 drivers/ata/libata-eh.c   |  207 +++++++++++++++++++++++++---------------------
 drivers/ata/libata-pmp.c  |   44 ++++-----
 drivers/ata/libata-scsi.c |    6 -
 drivers/ata/sata_sil24.c  |   11 ++
 include/linux/libata.h    |    4
 6 files changed, 170 insertions(+), 142 deletions(-)

--
tejun
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