Re: [PATCH] hpt366: fix HPT37x PIO mode timings (take 2)

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On Saturday 08 December 2007, Sergei Shtylyov wrote:
> After looking into the HPT370 manual (now that I have it) and re-checking all
> the timing tables, here's what I have discovered:
> 
> - at 33 MHz clock, PIO mode 0 timings turned to be overclocked, and all other
>   PIO modes underclocked;
> 
> - at 50 MHz clock, PIO modes 0 to 2 turned to be overclocked;
> 
> - at 66 MHz clock, PIO mode 0 was overclocked too.
> 
> Finally, the taskfile timing (matching PIO mode 0) turned to be overclocked at
> all clock frequencies (and in all manuals)...
> 
> The new timings have been tested on HPT370 chip (at 33 MHz PCI clock) and on
> HPT371N chip (at both 50 and 66 MHz DPLL clock).
> 
> Signed-off-by: Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx>

applied

> ---
> Many PIO modes at 55/66 MHz (as well as MDDMA modes at all clocks) are also
> underclocked but I decided not to touch them, at least for the time being.
> The patch is against the Linus' tree, with PIO0 setup time correct this time...

Since it is against Linus' tree I assume that it is safe enough to be merged
for 2.6.24, right?
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