Robert Hancock wrote:
Alistair John Strachan wrote:
Can you try reverting commit 721449bf0d51213fe3abf0ac3e3561ef9ea7827a
(link below) and see what effect that has?
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h
=721449bf0d51213fe3abf0ac3e3561ef9ea7827a
Obviously, I'll let you know if it happens again, but I've reverted
this commit and transferred 22.5GB over 45 minutes onto a RAID5 with 4
HDs on an NVIDIA sata controller, and this error hasn't appeared.
So I'm inclined to (very unscientifically) say that this brings it
back to 2.6.20's level of stability.
Interesting. Can you try un-reverting that patch, and applying this one?
The reading of the status register is something that was part of the
original
NVidia code, which I'm not really sure why is there. Given that reading
the status register clears the drive's interrupt status, that might be
causing some wierd interaction with the ADMA controller. Also, I added in
a printk for cases where notifiers are triggered but the command doesn't
indicate completion - if you still get problems, let me know if you see
that message.
AFAICS, when in ADMA mode, you absolutely should not touch the ATA
shadow registers at all.
This is normal for all controllers with both a "legacy mode" and an
"enhanced DMA mode" of some sort: the internal silicon state machines
"own" the ATA shadow registers while in enhanced DMA mode. Reading or
writing the ATA shadow registers while in enhanced DMA mode can lead to
undefined results, running the gamut from no-op to data corruption and
hardware lock-ups.
You may only access the ATA shadow registers when NV_ADMA_CTL_GO is
cleared, and then NV_ADMA_STAT_LEGACY is set, indicating the NVIDIA chip
is in register mode (aka legacy mode).
Jeff
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