Re: [PATCH] pata_sl82c105: wrong assumptions about compatible PIO modes

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Hello.

Alan wrote:

Fix the wrong "compatible" PIO mode choices: MWDMA0 has 480 ns cycle while PIO1
only has 383 ns cycle, and MWDMA2 timings matchs those of PIO4 exactly.

Thanks for all this review work

   Oh, I've only started but there's too much to do elsewhere... :-)

Frankly speaking, I'm not sure this function is useful or correct at all --
with the DMA timings being actually programmed in sl82c105_bmdma_start()...

It ought to be right
- bmdma_start loads the real DMA mode
- set_dmamode/set_piomode load the right PIO timings

You just said set_piomode() is called before set_dmamode() by the libata core anyway -- there seems to be no point in re-writing the modes until the actual DMA is started.

- bmdma_stop restores the right PIO timings

And the issue of the same registers being used for both PIO and DMA timings is
not specific for this driver at all but seems to be addressed only by it...

For most drivers (those using the ata_timing interface) the timing merge
is done by ata_timing_compute().

   Ah...

Signed-off-by: Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx>

Acked-by: Alan Cox <alan@xxxxxxxxxx>

MBR, Sergei
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