Jeff Garzik wrote:
I quite understand the implications. My argument comes from a different
angle: I don't feel we should be adding tons of code that essentially
validates the silicon.
Actually, I think libata-core can/should implement helper function to
handle ATA device malfunctions in controller-independent way. Most
FIS-based controllers provide some level of information about the most
recent FIS. The helper function can figure out what's going on and
required action with info available in the libata-core level and the FIS
info from LLD irq handler.
There are plenty of chances for the hardware to
fuck up in a way that corrupts data, and is also difficult to detect.
Pre-production BIOS have even done silly things like turn off data
verification (checksum) by default. Talk about subtle corruption...
So I feel the best path is to use the hardware programming sequences
described in the spec, because that's what the chip designers and Q/A
engineers validate with (read: the Windows driver).
I understand your concern about bloating LLDs with special case handling
coes but I don't really follow the above logic. Vendors include every
possible workaround in their proprietary drivers to make things work
smoothly. They don't stick to datasheets in the face existing problems.
Once we have deployed drivers with the standard programming sequences,
_then_ we can consider looking into proper spurious interrupt
accounting. The current AHCI interrupt accounting stuff is not nearly
as accurate as it should be, which implies that the code simply should
not exist at the present time.
I think it's okay to remove spurious interrupt accounting until AHCI irq
handling is in better shape as long as we plan to implement proper
handling in not too distant future. Also, please note that without code
that reporting such events, it would be difficult to learn what kind of
weird things happen.
Thanks.
--
tejun
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