Mark Lord wrote:
Jeff Garzik wrote:
In the case of sata_mv on the Marvell 6081 (which I'm looking at this
week)
it's hardware limit is actually 0xffffffff rather than 0xffff.
If the limit is not 0xffff, then there's no need for any of this
limitation junk. No s/g entry splitting after pci_map_sg(), no
artificial sg_tablesize limitation, etc.
Not even for a merged IOMMU segment that crosses the 4GB "boundary" ?
Clarification: this is a 64-bit PCI(e/X) device, and the above query
applies mainly to it's use in a 64-bit slot on a 64-bit kernel.
It's not clear to me whether this can be an issue on a 32-bit kernel
on 36-bit hardware, though.
Cheers
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