When selecting the clock dividers the Cadence I2C driver skips settings
where the resulting I2C bus frequency is larger than the requested
frequency.
If the resulting frequency is lower it will compute the error to actual
frequency. When calculating the difference it also handles the case where
the resulting frequency is larger.
Since the resulting frequency is always smaller or equal the computation of
the error can be simplified by only considering this case.
Signed-off-by: Lars-Peter Clausen <lars@xxxxxxxxxx>
---
drivers/i2c/busses/i2c-cadence.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c
index b5d22e7282c2..bec50bfe7aad 100644
--- a/drivers/i2c/busses/i2c-cadence.c
+++ b/drivers/i2c/busses/i2c-cadence.c
@@ -1030,8 +1030,7 @@ static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk,
if (actual_fscl > fscl)
continue;
- current_error = ((actual_fscl > fscl) ? (actual_fscl - fscl) :
- (fscl - actual_fscl));
+ current_error = fscl - actual_fscl;
if (last_error > current_error) {
calc_div_a = div_a;
--
2.30.2
