Hi Corentin, On Mon, 7 Nov 2022 16:06:02 +0000, Corentin Labbe wrote: > On my x05 laptop I got: > Memory type 0x12 not supported yet, not instantiating SPD Oh, that one must be old. > Adding the 0x12 case lead to a successful instantiated SPD AT24 EEPROM. > i801_smbus 0000:00:1f.3: SMBus using polling > i2c i2c-6: 2/2 memory slots populated (from DMI) > at24 6-0050: 256 byte spd EEPROM, read-only > i2c i2c-6: Successfully instantiated SPD at 0x50 > at24 6-0051: 256 byte spd EEPROM, read-only > i2c i2c-6: Successfully instantiated SPD at 0x51 > > And then, I decoded it successfully via decode-dimms. > > Signed-off-by: Corentin Labbe <clabbe@xxxxxxxxxxxx> > --- > The result of decode-dimms could be found at http://kernel.montjoie.ovh/zoo/x05/decode-dimms.txt > Since RAM is DDR, I wanted to add '/* DDR */' comment, but I didnt find any document with > proof that this 0x12 is for DDR. It is. The document you are looking for is: https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.6.0.pdf and specifically section 7.18.2 (Memory Device — Type), table 78 (Memory Device: Type). > > drivers/i2c/i2c-smbus.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c > index 07c92c8495a3..6dca19c994db 100644 > --- a/drivers/i2c/i2c-smbus.c > +++ b/drivers/i2c/i2c-smbus.c > @@ -362,6 +362,7 @@ void i2c_register_spd(struct i2c_adapter *adap) > } > > switch (common_mem_type) { > + case 0x12: > case 0x13: /* DDR2 */ > case 0x18: /* DDR3 */ > case 0x1C: /* LPDDR2 */ Please also add LPDDR (0x1B) for consistency. Thanks, -- Jean Delvare SUSE L3 Support
