The clk_rate attribute is not generic device tree bindings for I2C busses described in Documentation/devicetree/bindings/i2c/i2c.txt. It can be managed by clock binding. Support the driver to obtain clock information by clk_rate or clock property. Find clock first, if not, fall back to clk_rate. Signed-off-by: Weilong Chen <chenweilong@xxxxxxxxxx> Acked-by: Yicong Yang <yangyicong@xxxxxxxxxxxxx> --- Change since v4: - No change, just resend. As its the dependency "i2c: hisi: Add initial device tree support" is applied. Link: https://lore.kernel.org/lkml/Yz3XLfHGzrPcOEpn@shikoro/T/ Change since v3: - Commit message update. Link: https://lore.kernel.org/lkml/20220926091503.199474-1-chenweilong@xxxxxxxxxx/T/ Change since v2: - Remove redundant blank line. Link: https://lore.kernel.org/all/20220923011417.78994-1-chenweilong@xxxxxxxxxx/ Change since v1: - Ordered struct field to inverted triangle. - Use devm_clk_get_optional_enabled(). - Use IS_ERR_OR_NULL. Link: https://lore.kernel.org/lkml/20220921101540.352553-1-chenweilong@xxxxxxxxxx/ drivers/i2c/busses/i2c-hisi.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-hisi.c b/drivers/i2c/busses/i2c-hisi.c index bcc97e4fcb65..8c6c7075c765 100644 --- a/drivers/i2c/busses/i2c-hisi.c +++ b/drivers/i2c/busses/i2c-hisi.c @@ -7,6 +7,7 @@ #include <linux/bits.h> #include <linux/bitfield.h> +#include <linux/clk.h> #include <linux/completion.h> #include <linux/i2c.h> #include <linux/interrupt.h> @@ -88,6 +89,7 @@ struct hisi_i2c_controller { struct i2c_adapter adapter; void __iomem *iobase; struct device *dev; + struct clk *clk; int irq; /* Intermediates for recording the transfer process */ @@ -454,10 +456,15 @@ static int hisi_i2c_probe(struct platform_device *pdev) return ret; } - ret = device_property_read_u64(dev, "clk_rate", &clk_rate_hz); - if (ret) { - dev_err(dev, "failed to get clock frequency, ret = %d\n", ret); - return ret; + ctlr->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL); + if (IS_ERR_OR_NULL(ctlr->clk)) { + ret = device_property_read_u64(dev, "clk_rate", &clk_rate_hz); + if (ret) { + dev_err(dev, "failed to get clock frequency, ret = %d\n", ret); + return ret; + } + } else { + clk_rate_hz = clk_get_rate(ctlr->clk); } ctlr->clk_rate_khz = DIV_ROUND_UP_ULL(clk_rate_hz, HZ_PER_KHZ); -- 2.31.GIT
