Hi All,
> Hi everyone,
> > > The i2c irq is masked when pcie starts a i2c transfer process
> > > during noirq suspend stage. As a result, i2c transfer fails.
> > > To solve the problem, IRQF_NO_SUSPEND is added to i2c bus.
> > >
> > > Signed-off-by: Gao Pan <b54642@xxxxxxxxxxxxx>
> > > Signed-off-by: Fugang Duan <B38611@xxxxxxxxxxxxx>
> > > Signed-off-by: Vipul Kumar <vipul_kumar@xxxxxxxxxx>
> The SoB from Alifer Moraes is missing, too.
> > > goto rpm_disable;
> > >
> > > /* Request IRQ */
> > > - ret = request_threaded_irq(irq, i2c_imx_isr, NULL, IRQF_SHARED,
> > > + ret = request_threaded_irq(irq, i2c_imx_isr, NULL,
> > > + IRQF_SHARED | IRQF_NO_SUSPEND,
> > > pdev->name, i2c_imx);
> > > if (ret) {
> > > dev_err(&pdev->dev, "can't claim irq %d\n", irq);
> >
> >
> > I stumbled across Documentation/power/suspend-and-interrupts.rst which states:
> > > For this reason, using IRQF_NO_SUSPEND and IRQF_SHARED at the
> > > same time should be avoided.
> > Given this IMHO at least a comment should be inserted why this is fine. I dont
> > have a full picture about the situation, but to me it seems there is a
> > reference missing, or why/how does some PCIe start some I2C transfer when the
> > controller is suspended already? Do I miss something?
This patch has been introduced to fix the following behavior.
HW conditions
- Variscite DART-MX8M on DT8MCustomBoard v2.x or higher.
- The PCIe connector uses a reset pin coming from a GPIO expander connected to the I2C bus.
SW behavior
- Upon wake-up, the PCIe try toggling the reset pins, but the GPIO expander / I2C bus are still suspended, leading to a PCIe wake-up failure.
>From our investigation, we can't identify a way to postpone PCIe wake-up after I2C wake-up.
This patch is still present in latest NXP kernel 5.15, but please let me know if you think this should be approached / fixed in a different way.
Thanks
Regards
Pier
> Thank you for this comment, Alexander. I second you, this needs
> explanation.
> Happy hacking,
> Wolfram
