On Mon, Jul 22, 2019 at 09:05:56PM +0200, Michał Mirosław wrote:
> In SAMA5D2 datasheet, TWIHS_CWGR register rescription mentions clock
> offset of 3 cycles (compared to 4 in eg. SAMA5D3).
>
> Cc: stable@xxxxxxxxxxxxxxx # 5.2.x
> [needs applying to i2c-at91.c instead for earlier kernels]
> Fixes: 0ef6f3213dac ("i2c: at91: add support for new alternative command mode")
> Signed-off-by: Michał Mirosław <mirq-linux@xxxxxxxxxxxx>
Applied to for-current, thanks!
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