Re: [PATCH] i2c: at91: fix clk_offset for sama5d2

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On Mon, Jul 22, 2019 at 09:05:56PM +0200, Michał Mirosław wrote:
> 
> In SAMA5D2 datasheet, TWIHS_CWGR register rescription mentions clock
> offset of 3 cycles (compared to 4 in eg. SAMA5D3).
> 
> Cc: stable@xxxxxxxxxxxxxxx # 5.2.x
> [needs applying to i2c-at91.c instead for earlier kernels]
> Fixes: 0ef6f3213dac ("i2c: at91: add support for new alternative command mode")
> Signed-off-by: Michał Mirosław <mirq-linux@xxxxxxxxxxxx>
Acked-by: Ludovic Desroches <ludovic.desroches@xxxxxxxxxxxxx>

Thanks

> ---
>  drivers/i2c/busses/i2c-at91-core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/busses/i2c-at91-core.c b/drivers/i2c/busses/i2c-at91-core.c
> index 8d55cdd69ff4..435c7d7377a3 100644
> --- a/drivers/i2c/busses/i2c-at91-core.c
> +++ b/drivers/i2c/busses/i2c-at91-core.c
> @@ -142,7 +142,7 @@ static struct at91_twi_pdata sama5d4_config = {
>  
>  static struct at91_twi_pdata sama5d2_config = {
>  	.clk_max_div = 7,
> -	.clk_offset = 4,
> +	.clk_offset = 3,
>  	.has_unre_flag = true,
>  	.has_alt_cmd = true,
>  	.has_hold_field = true,
> -- 
> 2.20.1
> 



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