> I have used them to test your changes and my usecase on my available > hardware setup: an i.MX6 Solo (phyCORE-i.MX6). Good to have another platform tested. > In general: Great stuff! And I vote for inclusion :-) Cool! > > a) we decided to respect the current locking scheme and to not give atomic > > transfers a priority. The code needed for that would have been either > > incomplete or very invasive. And we cannot guarantee successful transfers > > anyhow. See [1] for the discussion and other write-ups for design choices. > > Ack. I can just confirm that the mentioned locking issues are a real. I > could not reproduce them on my single core ARM SoC, but on a multi core > ARM system, e.g. the CPU frequency scaler is maybe holding the I2C > transfer mutex, while the system is going to restart. There is freq scaling going on when 'system_state > SYSTEM_RUNNING'? Is this a guess or confirmed?
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