Hi Maxime, On Tue, Sep 23, 2014 at 09:00:57PM +0200, Maxime Ripard wrote: > Hi David, > > On Tue, Sep 23, 2014 at 11:40:26AM -0700, David E. Box wrote: > > This patch implements an I2C bus sharing mechanism between the host and platform > > hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC. > > > > On these platforms access to the PMIC must be shared with platform hardware. The > > hardware unit assumes full control of the I2C bus and the host must request > > access through a special semaphore. Hardware control of the bus also makes it > > necessary to disable runtime pm to avoid interfering with hardware transactions. > > > > Signed-off-by: David E. Box <david.e.box@xxxxxxxxxxxxxxx> > > Sorry for stepping in like this without really knowing your platform, > but wouldn't using the hwspinlock framework make more sense than > hardcoding your own internal functions here? I looked into this but didn't see a clear way on our platform to identify the semaphore seperately from doing it in the designware platform driver. The way we can find it now is through evaluating an ACPI _SEM object on every i2c device that gets probed by the dw driver since at probe time we can get the acpi handle. Without this handle however there isn't a clear way of evaluating the _SEM object which would be needed to register a hwspinlock in separate code. Plus it would still require changes to the designware i2c core, though admittedly having a generic hwspinlock pointer added to the struct is cleaner. Dave -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
