On Mon, 2 Jul 2012 12:08:14 +0200, Jean Delvare wrote: > On Mon, 2 Jul 2012 09:19:24 +0800, Daniel Kurtz wrote: > > My understanding is that the INTR wait is really waiting for the > > entire transaction to complete (ie., including i2c STOP condition), > > not just the byte transfer phase. > > This is my understanding as well, but I'm fairly certain that this is > the case of the BUSY flag as well. I think BUSY gets cleared at the > same time INTR (or any of the error status bits) gets set. Which is why > I think checking BUSY is redundant. As a matter of fact, we ignore BUSY > completely in i801_block_transaction_byte_by_byte(), so I see no reason > why we couldn't do the same in i2c_transaction(). To be complete, I made some testing and error bits can be set before BUSY is cleared. I spotted several transitions 0x41 -> 0x45 -> 0x44 when accessing non-existent devices. On success, I never witnessed INTR and BUSY being set at the same time, transition is always 0x41 -> 0x42. -- Jean Delvare -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
