Siddharth Chandrasekaran <sidcha@xxxxxxxxx> writes: > On Thu, Apr 08, 2021 at 04:44:23PM +0200, Vitaly Kuznetsov wrote: >> Siddharth Chandrasekaran <sidcha@xxxxxxxxx> writes: >> > On Thu, Apr 08, 2021 at 02:05:53PM +0200, Vitaly Kuznetsov wrote: >> >> Siddharth Chandrasekaran <sidcha@xxxxxxxxx> writes: >> >> > Now that all extant hypercalls that can use XMM registers (based on >> >> > spec) for input/outputs are patched to support them, we can start >> >> > advertising this feature to guests. >> >> > >> >> > Cc: Alexander Graf <graf@xxxxxxxxxx> >> >> > Cc: Evgeny Iakovlev <eyakovl@xxxxxxxxx> >> >> > Signed-off-by: Siddharth Chandrasekaran <sidcha@xxxxxxxxx> >> >> > --- >> >> > arch/x86/include/asm/hyperv-tlfs.h | 4 ++-- >> >> > arch/x86/kvm/hyperv.c | 1 + >> >> > 2 files changed, 3 insertions(+), 2 deletions(-) >> >> > >> >> > diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h >> >> > index e6cd3fee562b..1f160ef60509 100644 >> >> > --- a/arch/x86/include/asm/hyperv-tlfs.h >> >> > +++ b/arch/x86/include/asm/hyperv-tlfs.h >> >> > @@ -49,10 +49,10 @@ >> >> > /* Support for physical CPU dynamic partitioning events is available*/ >> >> > #define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE BIT(3) >> >> > /* >> >> > - * Support for passing hypercall input parameter block via XMM >> >> > + * Support for passing hypercall input and output parameter block via XMM >> >> > * registers is available >> >> > */ >> >> > -#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE BIT(4) >> >> > +#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE BIT(4) | BIT(15) >> >> >> >> TLFS 6.0b states that there are two distinct bits for input and output: >> >> >> >> CPUID Leaf 0x40000003.EDX: >> >> Bit 4: support for passing hypercall input via XMM registers is available. >> >> Bit 15: support for returning hypercall output via XMM registers is available. >> >> >> >> and HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE is not currently used >> >> anywhere, I'd suggest we just rename >> >> >> >> HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE to HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE >> >> and add HV_X64_HYPERCALL_XMM_OUTPUT_AVAILABLE (bit 15). >> > >> > That is how I had it initially; but then noticed that we would never >> > need to use either of them separately. So it seemed like a reasonable >> > abstraction to put them together. >> > >> >> Actually, we may. In theory, KVM userspace may decide to expose just >> one of these two to the guest as it is not obliged to copy everything >> from KVM_GET_SUPPORTED_HV_CPUID so we will need separate >> guest_cpuid_has() checks. > > Looks like guest_cpuid_has() check is for x86 CPU features only (if I'm > not mistaken) and I don't see a suitable alternative that looks into > vcpu->arch.cpuid_entries[]. So I plan to add a new method > hv_guest_cpuid_has() in hyperv.c to have this check; does that sound > right to you? > If you can give a quick go-ahead, I'll make the changes requested so > far and send v2 this series. Sorry my mistake, guest_cpuid_has() was the wrong function to name. In the meantime I started working on fine-grained access to the existing Hyper-V enlightenments as well and I think the best approach would be to cache CPUID 0x40000003 (EAX, EBX, EDX) in kvm_hv_set_cpuid() to avoid looping through all guest CPUID entries on every hypercall. Your check will then look like if (hv_vcpu->cpuid_cache.features_edx & HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE) ... if (hv_vcpu->cpuid_cache.features_edx & HV_X64_HYPERCALL_XMM_OUTPUT_AVAILABLE) ... We can wrap this into a hv_guest_cpuid_has() helper indeed, it'll look like: if (hv_guest_cpuid_has(vcpu, HYPERV_CPUID_FEATURES, CPUID_EDX, HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE)) ... but I'm not sure it's worth it, maybe raw check is shorter and better. I plan to send something out in a day or two, I'll Cc: you. Feel free to do v2 without this, if your series gets merged first I can just add the 'fine-grained access' to mine. Thanks! -- Vitaly
