On Thu, Apr 08, 2021 at 02:05:53PM +0200, Vitaly Kuznetsov wrote: > Siddharth Chandrasekaran <sidcha@xxxxxxxxx> writes: > > > Now that all extant hypercalls that can use XMM registers (based on > > spec) for input/outputs are patched to support them, we can start > > advertising this feature to guests. > > > > Cc: Alexander Graf <graf@xxxxxxxxxx> > > Cc: Evgeny Iakovlev <eyakovl@xxxxxxxxx> > > Signed-off-by: Siddharth Chandrasekaran <sidcha@xxxxxxxxx> > > --- > > arch/x86/include/asm/hyperv-tlfs.h | 4 ++-- > > arch/x86/kvm/hyperv.c | 1 + > > 2 files changed, 3 insertions(+), 2 deletions(-) > > > > diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h > > index e6cd3fee562b..1f160ef60509 100644 > > --- a/arch/x86/include/asm/hyperv-tlfs.h > > +++ b/arch/x86/include/asm/hyperv-tlfs.h > > @@ -49,10 +49,10 @@ > > /* Support for physical CPU dynamic partitioning events is available*/ > > #define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE BIT(3) > > /* > > - * Support for passing hypercall input parameter block via XMM > > + * Support for passing hypercall input and output parameter block via XMM > > * registers is available > > */ > > -#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE BIT(4) > > +#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE BIT(4) | BIT(15) > > TLFS 6.0b states that there are two distinct bits for input and output: > > CPUID Leaf 0x40000003.EDX: > Bit 4: support for passing hypercall input via XMM registers is available. > Bit 15: support for returning hypercall output via XMM registers is available. > > and HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE is not currently used > anywhere, I'd suggest we just rename > > HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE to HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE > and add HV_X64_HYPERCALL_XMM_OUTPUT_AVAILABLE (bit 15). That is how I had it initially; but then noticed that we would never need to use either of them separately. So it seemed like a reasonable abstraction to put them together. ~ Sid. Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879
