Am Sonntag, 26. Juni 2022, 04:11:42 CEST schrieb Samuel Holland: > D1 contains a pin controller similar to previous SoCs, but with some > register layout changes. It includes 6 interrupt-capable pin banks. > > D1s is a low pin count version of the D1 SoC, with some pins omitted. > The remaining pins have the same function assignments as D1. > > Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx> On a D1-Nezha Tested-by: Heiko Stuebner <heiko@xxxxxxxxx>
Re: [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s
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- Subject: Re: [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s
- From: Heiko Stuebner <heiko@xxxxxxxxx>
- Date: Fri, 01 Jul 2022 15:02:23 +0200
- In-reply-to: <20220626021148.56740-2-samuel@sholland.org>
- References: <20220626021148.56740-1-samuel@sholland.org> <20220626021148.56740-2-samuel@sholland.org>
- References:
- [PATCH 0/6] pinctrl: sunxi: Allwinner D1/D1s support
- From: Samuel Holland
- [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s
- From: Samuel Holland
- [PATCH 0/6] pinctrl: sunxi: Allwinner D1/D1s support
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