This series adds pinctrl support for the Allwinner D1/D1s SoCs. First, it updates the I/O bias code to support the new mode found on the D1/D1s (as well as some existing SoCs). Then it refactors the driver to support the new register layout found on the D1/D1s. Finally, it adds the new driver. The code size impact of the dynamic register layout ends up being just over 100 bytes: text data bss dec hex filename 11293 564 0 11857 2e51 pinctrl-sunxi.o (patch 3) 11405 564 0 11969 2ec1 pinctrl-sunxi.o (patch 6) This series was tested on A64, H6, and D1. Samuel Holland (6): dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s pinctrl: sunxi: Add I/O bias setting for H6 R-PIO pinctrl: sunxi: Support the 2.5V I/O bias mode pinctrl: sunxi: Refactor register/offset calculation pinctrl: sunxi: Make some layout parameters dynamic pinctrl: sunxi: Add driver for Allwinner D1/D1s .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 15 + drivers/pinctrl/sunxi/Kconfig | 5 + drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c | 860 ++++++++++++++++++ drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c | 2 +- drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 2 +- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 156 +++- drivers/pinctrl/sunxi/pinctrl-sunxi.h | 110 +-- 10 files changed, 1022 insertions(+), 131 deletions(-) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c -- 2.35.1