AMD pingroup can be extended to support multi-function pins. Hence define and use PINCTRL_GRP to manage and represent larger number of pingroups inline. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@xxxxxxx> --- drivers/pinctrl/pinctrl-amd.h | 39 ++++++++--------------------------- 1 file changed, 9 insertions(+), 30 deletions(-) diff --git a/drivers/pinctrl/pinctrl-amd.h b/drivers/pinctrl/pinctrl-amd.h index 1d4317073654..de2bc9dddc9c 100644 --- a/drivers/pinctrl/pinctrl-amd.h +++ b/drivers/pinctrl/pinctrl-amd.h @@ -296,37 +296,16 @@ static const unsigned i2c3_pins[] = {19, 20}; static const unsigned uart0_pins[] = {135, 136, 137, 138, 139}; static const unsigned uart1_pins[] = {140, 141, 142, 143, 144}; +#define PINCTRL_GRP(_name, _pins, _npins) \ + { .name = _name, .pins = _pins, .npins = _npins} + static const struct amd_pingroup kerncz_groups[] = { - { - .name = "i2c0", - .pins = i2c0_pins, - .npins = 2, - }, - { - .name = "i2c1", - .pins = i2c1_pins, - .npins = 2, - }, - { - .name = "i2c2", - .pins = i2c2_pins, - .npins = 2, - }, - { - .name = "i2c3", - .pins = i2c3_pins, - .npins = 2, - }, - { - .name = "uart0", - .pins = uart0_pins, - .npins = 5, - }, - { - .name = "uart1", - .pins = uart1_pins, - .npins = 5, - }, + PINCTRL_GRP("i2c0", i2c0_pins, 2), + PINCTRL_GRP("i2c1", i2c1_pins, 2), + PINCTRL_GRP("i2c2", i2c2_pins, 2), + PINCTRL_GRP("i2c3", i2c3_pins, 2), + PINCTRL_GRP("uart0", uart0_pins, 5), + PINCTRL_GRP("uart1", uart1_pins, 5), }; #endif -- 2.25.1