On Sun, 25 Aug 2019 at 10:04, Lukas Wunner <lukas@xxxxxxxxx> wrote:
>
> The CPER parser assumes that the class code is big endian, but at least
> on this edk2-derived Intel Purley platform it's little endian:
>
> efi: EFI v2.50 by EDK II BIOS ID:PLYDCRB1.86B.0119.R05.1701181843
> DMI: Intel Corporation PURLEY/PURLEY, BIOS PLYDCRB1.86B.0119.R05.1701181843 01/18/2017
>
> {1}[Hardware Error]: device_id: 0000:5d:00.0
> {1}[Hardware Error]: slot: 0
> {1}[Hardware Error]: secondary_bus: 0x5e
> {1}[Hardware Error]: vendor_id: 0x8086, device_id: 0x2030
> {1}[Hardware Error]: class_code: 000406
> ^^^^^^ (should be 060400)
>
> Signed-off-by: Lukas Wunner <lukas@xxxxxxxxx>
> ---
> drivers/firmware/efi/cper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c
> index addf0749dd8b..b1af0de2e100 100644
> --- a/drivers/firmware/efi/cper.c
> +++ b/drivers/firmware/efi/cper.c
> @@ -381,7 +381,7 @@ static void cper_print_pcie(const char *pfx, const struct cper_sec_pcie *pcie,
> printk("%s""vendor_id: 0x%04x, device_id: 0x%04x\n", pfx,
> pcie->device_id.vendor_id, pcie->device_id.device_id);
> p = pcie->device_id.class_code;
> - printk("%s""class_code: %02x%02x%02x\n", pfx, p[0], p[1], p[2]);
> + printk("%s""class_code: %02x%02x%02x\n", pfx, p[2], p[1], p[0]);
> }
> if (pcie->validation_bits & CPER_PCIE_VALID_SERIAL_NUMBER)
> printk("%s""serial number: 0x%04x, 0x%04x\n", pfx,
Class codes are always in that order, so the original code is simply wrong.
Acked-by: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
I'll get this queued shortly.
Thanks,
