Johannes Stezenbach wrote:
On Fri, Jun 02, 2006, Manu Abraham wrote:
Johannes Stezenbach wrote:
So, it seems that for hierarchical BC mode PLHEADER does
not use pi/2-BPSK. Now, I don't know if and how the
receiver could figure out that hierarchical modulation
is used, however, once it knows that, it can get the
other transmission parameters from the PLHEADER.
Well, in BC-BS mode we have the S2 satellite delivery system descriptor
I will try to explain what i understood.
According to the patent
United States Patent Application: 20050089068
[snip]
An approach is provided for supporting signal acquisition and frame
synchronization in a digital broadcast system utilizing Low Density
Parity Check (LDPC) codes. Hierarchical modulation is utilized to
provide backward compatibility, whereby the lower layer signal is
encoded using LDPC coding. A signal is received, whereby the signal is
modulated according to the hierarchical modulation scheme including an
upper layer and a lower layer. The signal includes a data pattern and a
coded frame. The dependency of the received signal on the upper layer
modulation is removed. The modulation removed signal is correlated with
multiple predetermined data patterns to determine the data pattern of
the signal. The code rate of the coded frame is derived based on the
determined data pattern. The above arrangement is particularly suited to
a digital satellite broadcast system.
[snip]
While STB0899 does not seem to have a register for
enabling hierarchical BC mode, it still has a (read-only)
"low priority stream detection" bit in register TSULSTKM.)
Maybe this is a hint that it can detect hierarchical
BC mode by itself.
Well, the question is not how hierarchical modulation works,
the question is if and how the demod can detect this
automatically. The text from the patent you quoted doesn't
shed any light on this, it says (if I understand it right)
that one has to know that hierarchical modulation is used,
then remove the HP part and then "correlate with multiple
predetermined data patterns" (the ones given in EN 302 307
annex F) to find the code rate.
The patent elsewhere says like this..
[0036] In addition, a lower layer transmits another data stream
independent of the upper layer, whereby the lower layer can be Binary
Phase Shift Keying (BPSK) modulated. The BPSK modulated data is
converted to phase information associated with a predetermined angle
.theta. by a converter 303. The angle .theta. can be determined based on
the available power. The modulated upper and lower layers are then
multiplied by a multiplier 305. According to one embodiment of the
present invention, the multiplied signal is further pulse-shaped.
[0037] Signal acquisition involves determining whether a lower layer
signal exists. If the lower layer signal is provided, the module 301
then determines .theta.. According to an embodiment of the present
invention, the lower layer is coded with Low Density Parity Check (LDPC)
code. LDPC codes are typically rather long, for instance, of length
64,800 bits per LDPC coded frame. In order to properly decode the LDPC
code, the receiver needs to first achieve frame synchronization.
[0038] FIG. 4 is a diagram of an exemplary signal constellation used by
the hierarchical constellation mapper of FIG. 2. As seen in FIG. 4, the
two bits that are underscored represent the upper layer. The
constellation 400 chooses two bits from the upper layer and one bit from
the lower layer to select one of the points of the hierarchical
constellation point. It is recognized that other equivalent labeling of
the constellation can be utilized; for instance, the constellation can
be labeled based on Gray labeling. In any configuration, to maintain the
backward compatibility, the upper layer is mapped in the manner defined
by the particular legacy system (e.g., DVB-S system).
[0039] Under the above arrangement, the upper layer can be received by
any legacy receiver employing traditional digital receiver design
technologies. In fact, the upper layer receiver does not need to be
aware of the existence of the lower layer. The received signal is timing
and carrier phase synchronized for the upper layer before it is passed
to the upper layer forward error correction coding. Since the lower
layer is subjected to the same timing and carrier phase impairments, the
lower layer has the benefit of the achieved timing and carrier phase
synchronization of the upper layer.
[0040] Before the lower layer LDPC decoder can function, the framing
information of the LDPC code, which includes the starting point of a
LDPC coded frame and the code rate of the LDPC code, has to be acquired.
This aspect significantly differs from the upper layer processing.
Firstly, the lower layer operates at low signal-to-noise ratios,
typically, at Es/No below 0 dB. Secondly, the lower layer needs to
recover the framing information to proceed to LDPC decoding, whereas the
upper layer can be first decoded, as convolutional coding can be self
synchronized without using any framing information. This suggests that
upper layer framing recovery can benefit from the coding gain of the
forward error correction coding. In contrast, the lower layer cannot
benefit from the coding gain. Furthermore, in order to maintain backward
compatibility, any framing information of the lower layer has to be
carried strictly in the lower layer. At any given transmission epoch,
both upper and lower layers are used to determine the signal point to be
transmitted; thus, the transmission of known signal points for training
the lower layer cannot be used.
This would match my understanding as decribed in my previous
mail, that the PLHEADER is not pi/2-BPSK modulated but part
of the LP bitsream in hierarchical mode.
Yes
(This is consistent with annex F, the input to the
hierarchical mapper is a *bitstream*, not a pre-modulated
signal.
Yes, only the hierarchial mapper plays around with it. I made a nice
diagram which makes it a bit more clear. The figure in Annex F is a bit
confusing (not saying that it is wrong, but it is confusing)
in pdf format: http://www.thadathil.net/dvb/hmod/illustration.pdf
in compressed SVG format:
http://www.thadathil.net/dvb/hmod/illustration.svgz
If someone has issues with mime types, the directory view
http://www.thadathil.net/dvb/hmod/
Also, I guess pi/2-BPSK PLHEADER would break
DVB-S HP receiption.)
I don't understand why. maybe i didn't follow it clearly, maybe you can
explain, why you felt that way.
For the STB0899 the information might not be needed, but could be needed
by another demod some time later.
possible
Currently I think the demod could just try to find SOF pattern
in pi/2-BPSK demodulated bitstream, and if that fails try
to find one of the BC patterns in hierarchical demodulated
LP-bitstream. If a particular demod cannot do this in firmware, but
has a register to explicitely choose hierarchical BC mode, we
could emulate it in dvb-core (similar to INVERSION_AUTO emulation).
Ok, ACK
I think for the time being we can go with the minimalist approach as it
is in multiproto7
I would do it that way, yes.
Agreed
Thanks,
Manu
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