Re: [PATCH 07/12] drm: drm_display_mode: add signal polarity flags

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On Tue, Mar 18, 2014 at 08:50:30AM +0100, Lothar Waßmann wrote:
> Hi,
> 
> Laurent Pinchart wrote:
> > Hi Lothar,
> > 
> > On Monday 17 March 2014 16:14:36 Lothar Waßmann wrote:
> > > DE is not a clock signal, but an 'Enable' signal whose value (high or
> > > low) defines the window in which the pixel data is valid.
> > > The flag defines whether data is valid during the HIGH or LOW period of
> > > DE.
> > 
> > The DRM_MODE_FLAG_POL_DE_(LOW|HIGH) do, by my impression of the proposed new 
> > DRM_MODE_FLAG_POL_DE_*EDGE flags is that they define sampling clock edges, not 
> > active levels.
> > 
> The current naming of the flags gives the impression that they describe
> the sampling edges of a clock signal. But the DE signal in fact is not
> a clock signal but a level sensitive gating signal.

+1

-- 
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