Hello all, there exist an increasing number of default FPGA IP cores with a scatter/gather DMA controller, either as a silicon core or programmable logic core. In case of Altera, there exist an example chaining DMA IP core that can use the soft or hard IP core and provided a clean host-memory descriptor based approach to scatter/gather DMA. It acts as a starting point for customization. http://www.altera.com/literature/ug/ug_pci_express.pdf I would like to see if there is interest in developing a clean Linux driver counterpart. I can spend time on this, and I will. But I'm sure this can proceed faster in a joint effort. In any case, I'll like to ask if this is the right mailing list to ask for advice on device driver internals. Regards, -- Leon
