On Mon, Aug 04, 2008 at 12:00:58AM +0200, Leon Woestenberg wrote: > Hello all, > > there exist an increasing number of default FPGA IP cores with a > scatter/gather DMA controller, either as a silicon core or > programmable logic core. > > In case of Altera, there exist an example chaining DMA IP core that > can use the soft or hard IP core and provided a clean host-memory > descriptor based approach to scatter/gather DMA. It acts as a starting > point for customization. > http://www.altera.com/literature/ug/ug_pci_express.pdf > > I would like to see if there is interest in developing a clean Linux > driver counterpart. What could such a driver be used for? It seems that this device is a building block for other hardware types, right? thanks, greg k-h
