nand-ecc-level property statically defines NAND chip's ECC requirements. Signed-off-by: Boris BREZILLON <b.brezillon.dev@xxxxxxxxx> --- Documentation/devicetree/bindings/mtd/nand.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt index 03855c8..0c962296 100644 --- a/Documentation/devicetree/bindings/mtd/nand.txt +++ b/Documentation/devicetree/bindings/mtd/nand.txt @@ -3,5 +3,8 @@ - nand-ecc-mode : String, operation mode of the NAND ecc mode. Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", "soft_bch". +- nand-ecc-level : Two cells property defining the ECC level requirements. + The first cell represent the strength and the second cell the ECC block size. + E.g. : nand-ecc-level = <4 512>; /* 4 bits / 512 bytes */ - nand-bus-width : 8 or 16 bus width if not present 8 - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
