> What about my use case of having a NIC which can stamp at a low rate > at the PHY (for PTP) and high rate at the DMA block (for congestion > control)? Both stamp points have the same PHC index. How theoretical is that? To me, it seems more likely you have two PHC. The PHY stamping tends to be slow because of the MDIO bus. If the MAC has fast access to the PHC, it means its not on the MDIO bus. It probably means you have the PHY integrated into the MAC/SoC, so the MAC can access it. But if its integrated like this, i don't see why PHY stamping should be particularly slow. So you can probably use it for congestion control. And then you don't need DMA stamping. Do you know of real hardware with a MAC and a PHY sharing a PHC? Andrew
