> -----Original Message----- > From: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx> > Sent: 2020年9月28日 3:56 > To: Joakim Zhang <qiangqing.zhang@xxxxxxx>; linux-can@xxxxxxxxxxxxxxx > Cc: dl-linux-imx <linux-imx@xxxxxxx>; netdev@xxxxxxxxxxxxxxx > Subject: Re: [PATCH linux-can-next/flexcan 1/4] can: flexcan: initialize all flexcan > memory for ECC function > > On 9/27/20 10:01 AM, Joakim Zhang wrote: > > [...] > >> Can you create a "static const struct" holding the reg (or offset) + > >> len and loop over it. Something linke this? > >> > >> const struct struct flexcan_ram_init ram_init[] { > >> void __iomem *reg; > >> u16 len; > >> } = { > >> { > >> .reg = regs->mb, /* MB RAM */ > >> .len = sizeof(regs->mb), / sizeof(u32), > >> }, { > >> .reg = regs->rximr, /* RXIMR RAM */ > >> .len = sizeof(regs->rximr), > >> }, { > >> ... > >> }, > >> }; > > > > In this version, I only initialize the implemented memory, so that > > it's a several trivial memory slice, reserved memory not initialized. > > Follow your point, I need create a global pointer for struct > > flexcan_reg, i.e. static struct flexcan_regs *reg, so that we can use > > .reg = regs->mb in ram_init[], IMHO, I don't quite want to add this, > > or is there any better solution to get the reg/len value? > > One option is not to make it a global variable, but to move it into the function, > then you have the reg pointer available. Will take into account if later we also need implement this struct. > > According to below notes and discussed with IP owner before, reserved > > memory also can be initialized. So I want to add two memory regions, > > and initialize them together, this could be more clean. I will send > > out a V2, please let me know which one do you think is better? > > If it's OK on all SoCs to initialize the complete RAM area, just do it. Then we can > get rid of the proposed struct at all. Should be OK according to IP guys feedbacks. I am checking layerscape's CAN section: There is no ECC section in LS1021A https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-multicore-processors/layerscape-1021a-dual-core-communications-processor-with-lcd-controller:LS1021A?tab=Documentation_Tab ECC section in LX2160A, also contains the same NOTE as i.MX8MP. https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-multicore-processors/layerscape-lx2160a-multicore-communications-processor:LX2160A?tab=Documentation_Tab Hi @Pankaj Bansal, could you please also have a check? Best Regards, Joakim Zhang > > "CTRL2[WRMFRZ] grants write access to all memory positions that > > require initialization, ranging from 0x080 to 0xADF and from 0xF28 to > > 0xFFF when the CAN FD feature is enabled. The RXMGMASK, RX14MASK, > > RX15MASK, and RXFGMASK registers need to be initialized as well. > > MCR[RFEN] must not be set during memory initialization." > > Marc > > -- > Pengutronix e.K. | Marc Kleine-Budde | > Embedded Linux | https://www.pengutronix.de | > Vertretung West/Dortmund | Phone: +49-231-2826-924 | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |