On 4/11/19 3:16 AM, Joakim Zhang wrote: >> Whatever mode you enable via user space use user space to disable them >> again. > > Thank you for your detailed explanation. But in flexcan driver, it > just set register bit when mode on and do not clear register bit when > mode off, e.g. loopback, listennoly, 3 samples.... Let's see: > reg = priv->read(®s->ctrl); The ctrl reg is read > reg &= ~(FLEXCAN_CTRL_PRESDIV(0xff) | > FLEXCAN_CTRL_RJW(0x3) | > FLEXCAN_CTRL_PSEG1(0x7) | > FLEXCAN_CTRL_PSEG2(0x7) | > FLEXCAN_CTRL_PROPSEG(0x7) | > FLEXCAN_CTRL_LPB | > FLEXCAN_CTRL_SMP | > FLEXCAN_CTRL_LOM); ....the loopback mode, 3 sample mode and listen only mode bits are masked out.... > reg |= FLEXCAN_CTRL_PRESDIV(bt->brp - 1) | > FLEXCAN_CTRL_PSEG1(bt->phase_seg1 - 1) | > FLEXCAN_CTRL_PSEG2(bt->phase_seg2 - 1) | > FLEXCAN_CTRL_RJW(bt->sjw - 1) | > FLEXCAN_CTRL_PROPSEG(bt->prop_seg - 1); > > if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) > reg |= FLEXCAN_CTRL_LPB; > if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) > reg |= FLEXCAN_CTRL_LOM; > if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) > reg |= FLEXCAN_CTRL_SMP; ...and the bits are set, if enabled by user space... > netdev_dbg(dev, "writing ctrl=0x%08x\n", reg); > priv->write(reg, ®s->ctrl); ...and written to the register. So all three bits will be unset, if unset by user space, right? > When we configure mode off after configured mode on in the user > space, corresponding bit will not change. Is this should be improved > in flexcan driver? That should work. If it doesn't work, we need a fix. regards, Marc -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
Attachment:
signature.asc
Description: OpenPGP digital signature