Re: Initial msm8909 support

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On Thu, Dec 21, 2017 at 6:45 AM, Bjorn Andersson
<bjorn.andersson@xxxxxxxxxx> wrote:
> On Tue 19 Dec 09:30 PST 2017, Will Newton wrote:
>
>> On Tue, Dec 19, 2017 at 2:21 PM, Will Newton <will.newton@xxxxxxxxx> wrote:
>> > On Tue, Dec 19, 2017 at 9:44 AM, Will Newton <will.newton@xxxxxxxxx> wrote:
>> >> Hi,
>> >>
>> >> I have a git tree with my initial start at msm8909 support in Linux 4.9 here:
>> >>
>> >> https://bitbucket.org/andromedauk/msm8909-linux
>> >>
>> >> It's based off the Linaro Qualcomm landing team tree (with Android
>> >> drivers merged too for no useful reason).
>> >>
>> >> The current state is that pinctrl is pretty much done, regulators are
>> >> mostly done, clocks is quite hard to say as I'm not doing a good job
>> >> of parsing the docs right now. The serial port works! I've seen the
>> >> USB driver enumerate a hub but not tested any further.
>> >>
>> >> Outstanding tasks:
>> >>
>> >> 1. Semi-random resets during boot. Occasionally the board will reset
>> >> for no obvious reason during boot. I suspect this is something to do
>> >> with regulators as it usually seems to be around the time something is
>> >> setting voltage and turning on initcall debugging seems to make it
>> >> less likely to happen (by slowing the boot).
>> >
>> > FWIW these resets go away if I disable the wcnss driver in the dts.
>>
>> Specifically the code that triggers the reset is the call to
>> qcom_scm_pas_auth_and_reset in qcom_wcnss.c. If I comment that call
>> out then the boot seems to be stable. Does anyone have any ideas what
>> might cause that behaviour?
>>
>
> It's worth noting that there are two sets of errors that occurs in
> qcom_scm_pas_auth_and_reset(); either the implementation of the call
> itself fails - typically from the lack of clocking of the crypto block -
> or if the call succeeds the ARM core in the WiFi subsystem will start
> execute the firmware and this might access hardware with expectations on
> what the Linux side has configured.

The crash is unreliable (not every boot) and async - it doesn't happen
exactly at the time of the scm call but soon after, suggesting it is
the wifi subsystem that starts up and then may crash for some reason.

> Looking at the pronto in 8916, the only two pieces that comes to mind is
> that either vddmx or vddpx are off; or that there are some other nuances
> here that I missed when specifying the associated resources - which
> isn't needed on the db410c.

AFAIK the vddmx (l3) and vddpx (l7) supplies are both setup correctly.
The vddcx supply is not specified but I believe it is s1 which
supplies the CPU core so should always be enabled. I've pasted the
regulator summary on a successful boot (no crash but wcn driver did
not probe) below.

One difference I did notice in 3.10 is that msm8909 is listed as
pronto "v3" and msm8916 is listed as "vt". This seems to mean the
regulators are specified slightly differently:

https://source.codeaurora.org/quic/la/kernel/msm-3.10/tree/drivers/net/wireless/wcnss/wcnss_vreg.c?h=LA.BR.1.2.9-03310-8x09.0#n149

But its using voltage corners which to be honest I don't really understand.


  regulator                      use open bypass voltage current     min     max
-------------------------------------------------------------------------------
 regulator-dummy                  0    1      0     0mV     0mA     0mV     0mV
    a204000.wcnss                                                   0mV     0mV
 vph_pwr                          0   11      0  5000mV     0mA  5000mV  5000mV
    s1                            0    0      0  1300mV     0mA  1300mV  1300mV
    s2                            0    8      0  1850mV     0mA  1850mV  1850mV
       l1                         0    0      0  1000mV     0mA  1000mV  1000mV
       l2                         1    1      0  1200mV     0mA  1200mV  1200mV
          78d9000.phy                                            1200mV  1200mV
       l3                         0    1      0  1287mV     0mA   500mV  1350mV
          a204000.wcnss                                          1287mV  1287mV
       l4                         0    0      0  1800mV     0mA  1800mV  1800mV
       l5                         1    2      0  1800mV     0mA  1800mV  1800mV
          a204000.wcnss:iris                                     1800mV  1800mV
          7824900.sdhci                                          1800mV  1950mV
       l6                         0    1      0  1800mV     0mA  1800mV  1800mV
          1ac8300.dsi-phy                                           0mV     0mV
       l7                         1    3      0  1800mV     0mA  1800mV  1800mV
          a204000.wcnss:iris                                     1800mV  1800mV
          a204000.wcnss                                          1800mV  1800mV
          78d9000.phy                                            1800mV  1800mV
       l10                        0    1      0  1300mV     0mA  1225mV  1350mV
          a204000.wcnss:iris                                     1300mV  1300mV
    l8                            1    1      0  2900mV     0mA  2850mV  2900mV
       7824900.sdhci                                             2900mV  2900mV
    l9                            0    1      0  3300mV     0mA  3000mV  3300mV
       a204000.wcnss:iris                                        3300mV  3300mV
    l11                           0    0      0  1800mV     0mA  1800mV  2950mV
    l12                           0    0      0  1800mV     0mA  1800mV  2950mV
    l13                           1    1      0  3075mV     0mA  3075mV  3075mV
       78d9000.phy                                               3050mV  3300mV
    l14                           0    0      0  1800mV     0mA  1800mV  3000mV
    l15                           0    0      0  1800mV     0mA  1800mV  3000mV
    l17                           0    0      0  2800mV     0mA  2800mV  2850mV
    l18                           0    0      0  2700mV     0mA  2700mV  2700mV
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