On Tuesday, November 8, 2016 3:06:22 PM CET Stephen Boyd wrote: > > + > > + config = readl_relaxed(host->ioaddr + CORE_DLL_CONFIG_2); > > + config &= ~(0xFF << 10); > > + config |= mclk_freq << 10; > > + > > + writel_relaxed(config, host->ioaddr + CORE_DLL_CONFIG_2); > > + /* wait for 5us before enabling DLL clock */ > > Usually there's a barrier between writel_relaxed() and delay > because we don't know when the writel will be posted out and the > delay is there to wait for the operation to happen. Probably > should change this to be a writel() instead. > The barrier in writel() is not for posted writes, it is to synchronize with memory accesses *before* the write. In general, if you want to ensure that a write has made it to the device, you need to read back from the same address (the specific behavior may depend on the bus). While in general, using the non-relaxed accessors should be the default (and there should be a comment for each *_relaxed access), but I don't think using writel() would let you skip the delay here. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
