On 11/07, Ritesh Harjani wrote: > diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c > index 8ef44a2a..42f42aa 100644 > --- a/drivers/mmc/host/sdhci-msm.c > +++ b/drivers/mmc/host/sdhci-msm.c > @@ -137,8 +137,9 @@ static int msm_config_cm_dll_phase(struct sdhci_host *host, u8 phase) > writel_relaxed(config, host->ioaddr + CORE_DLL_CONFIG); > > /* Set CK_OUT_EN bit of DLL_CONFIG register to 1. */ > - writel_relaxed((readl_relaxed(host->ioaddr + CORE_DLL_CONFIG) > - | CORE_CK_OUT_EN), host->ioaddr + CORE_DLL_CONFIG); > + config = readl_relaxed(host->ioaddr + CORE_DLL_CONFIG); > + config |= CORE_CK_OUT_EN; > + writel_relaxed(config, host->ioaddr + CORE_DLL_CONFIG); > > /* Wait until CK_OUT_EN bit of DLL_CONFIG register becomes '1' */ > rc = msm_dll_poll_ck_out_en(host, 1); > @@ -305,6 +306,7 @@ static int msm_init_cm_dll(struct sdhci_host *host) > struct mmc_host *mmc = host->mmc; > int wait_cnt = 50; > unsigned long flags; > + u32 config = 0; It needs to be initialized? > > spin_lock_irqsave(&host->lock, flags); > > @@ -313,33 +315,40 @@ static int msm_init_cm_dll(struct sdhci_host *host) > * tuning is in progress. Keeping PWRSAVE ON may > * turn off the clock. > */ > - writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC) > - & ~CORE_CLK_PWRSAVE), host->ioaddr + CORE_VENDOR_SPEC); > + config = readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC); It's written here unconditionally though? > + config &= ~CORE_CLK_PWRSAVE; -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
